PCIe 7.0 First Official Draft Lands, Doubling Bandwidth Yet Again
The Register, Wednesday, April 3rd, 2024
The downside? You probably won't see kit to use it until 2027
The PCIe 7.0 spec is on track for release next year and, for many AI chip peddlers trying to push the limits of network fabrics and accelerator meshes, it can't come soon enough.
On Tuesday the PCI SIG consortium that steers the interface's development emitted version 0.5 of PCIe 7.0, and hailed it as the official first draft of the specification. The blueprint calls for 128GT/s per lane of raw throughput, continuing the generational doubling that we've come to expect from the peripheral component interconnect standard.
This higher performance will enable up to 512GB/s of bidirectional bandwidth from an x16 slot. That's compared to the 256GB/s that PCIe 6.0 devices will be capable of pushing when they start hitting the market later this year.